Dr. Dileep Bhandarkar Distinguished Engineer, Global Foundation Services, Microsoft Corporation
Dr. Dileep Bhandarkar joined Microsoft as a Distinguished Engineer responsible for Server Hardware Architecture and Standards for Global Foundation Services in May 2007. Global Foundation Services delivers the foundational platform for Microsoft’s Online Services, including MSN and Windows Live-branded services, Microsoft communication and collaboration services, as well as 150 additional services and Web portals.
He was elected an IEEE Fellow in 1997 for contributions and technical leadership in the design of complex and reduced instruction set architecture and in computer system performance analysis. In 1998, he was recognized as a Distinguished Alumnus of the Indian Institute of Technology, Bombay, where he received his B. Tech in Electrical Engineering in 1970. He also has a M.S. and Ph.D. in Electrical Engineering from Carnegie Mellon University, and has done graduate work in Business Administration at the University of Dallas.
Prior to joining Microsoft, he was Director of Advanced Architecture in the CTO Office of Intel’s Digital Enterprise Group and a lead spokesperson for evangelizing Intel server platform technologies to the industry and financial analysts. He was an Intel Distinguished Lecturer for several years. He has held several Director-level positions related to CPU and Platform Architecture, and Strategic Planning over a 12 year career at Intel. He was instrumental in driving the strategic decision to implement AMD compatible 64-bit x86 architecture at Intel, and pioneered the adoption of energy efficient microprocessor cores across Intel’s product line.
Prior to joining Intel in 1995, he spent almost 18 years at Digital Equipment Corporation, where he managed processor and system architecture, and performance analysis work related to the VAX, Prism, MIPS, and Alpha architectures. He also worked at Texas Instruments for 4 years in their research labs in a variety of areas including magnetic bubble memories, charge coupled devices, fault tolerant memories, and computer architecture.
Dr. Bhandarkar holds 16 U.S. Patents and has published more than 30 technical papers in various journals and conference proceedings. He is also the author of a book titled Alpha Implementations and Architecture. He has delivered several invited keynote speeches at computer and financial industry conferences.