It’s that time again! With the 52nd Annual Design Automation Conference just around the corner, I’m pleased to share some key highlights that you can expect from Samsung Foundry at the event.
Samsung Foundry Booth #933
- Samsung. Open. Collaboration (S.O.C) Theater
– Hourly presentations beginning at 11:30 a.m. each day from Samsung and our key ecosystem partners
– Presentations will be live-streamed for those who are unable to make it.
– Topics include process, IP and design enablement at 14 and 10nm FinFET nodes as well as 28nm updates
– Raffle drawings directly following each presentation
– Daily grand prize drawings at 5:50 p.m. each day
Partner Activities
- Samsung/ARM/Synopsys Breakfast
– Topic: Enabling Network Computing Design with 14nm LPP FinFET Technology
– Date: Tuesday, June 9
– Time: 7:30 to 8:45 a.m.
– Location: Park Central Hotel (formerly Westin), Metropolitan Ballroom I - Samsung/ARM/GLOBALFOUNDRIES Panel
– Topic: Advancing the Common Eco-System on 14LPP
– Date: Monday, June 8 and Wednesday, June 10
– Location: ChipEstimate Booth #2433
– Time: 3:00 p.m. on both days - Synopsys Lunch & Learn
– Topic: SoC Leaders Verify with Synopsys
– Date: Tuesday, June 9
– Location: Park Central Hotel (formerly Westin), Metropolitan Ballroom I
– Time: 11:30 a.m. – 1:30 p.m. - Partners In-Booth Theaters
On a daily basis, Samsung Foundry spokespeople will be presenting in our ecosystem partners’ in-booth theaters.
DAC Technical Sessions
- DAC Designer Track
– Topic: FinFET Design Tools and Flows – Why You Need It, How You Get It
– Date: Tuesday, June 9
– Location: Rm 105, Moscone Center South
– Time: 10:30 a.m. – 11:30 a.m.
With all of these activities, you’re bound to catch a Samsung Foundry rep somewhere on the show floor or at a partner event presenting information vital to design success at the most advanced process nodes.
We look forward to seeing you the week of June 8 in San Francisco!